| Socket Adapter (click to buy) | Description | Package | Devices Supported | Adapter Capacity per Site | Sockets per Adapter | 2900L, 3910, 4910, 3928, 3901, 3900, 2900, 4900, 1900 |
|---|---|---|---|---|---|---|
| FVEASM256BGMB | Automated SOCKET CARD, 256 PIN BGA | BGA(256) | 7 | 1 | 1 | ✓ |
| Device Name | Xilinx XC7A50T-L2FTG256E (Custom 01) (ID=C093h) |
| Manufacturer | Xilinx |
| Part Number | XC7A50T-L2FTG256E (Custom 01) (ID=C093h) |
| 8-bit Bytes | 2192648.0 |
| Vcc(program) | 1.8 |
| Set programming | Yes |
| Memory Regions | 0h-FFh; 100h-103h; 104h-107h; 108h-21 7507h; |
| Electrical Erase | nan |
| Packages | BGA(256) |
| Notes | IMPORTANT: This device selection is custom. Please contact Tech Support before using this device selection. Each bit in this device is One-Time Programmable (OTP). If a given eFUSE row has already been programmed it will not be able to be programmed correctly again. It is recommended to keep Blank Check enabled during Program. The FUSE_KEY bits are loaded via a .nky file. The key file should be loaded to Data Pattern address [000000h]. The Key 0 field must be in [000000h-0000FFh] in the Data Pattern (LSB-to-MSB). The FUSE_USER bits map to [000100h-000103h] in the Data Pattern (MSB-to-LSB). The FUSE_CNTL bits map to bits [5:0] of Data Pattern address [000107h]. The redundancy bits are programmed with the respective FUSE_CNTL bits. These bits map to the Device Config Settings. The bitstream maps to [000108h-217507h] in the Data Pattern. The bitstream file should be loaded to Data Pattern address [000108h]. This device selection supports bitstreams in .bin .mcs or .bit formats. |
| Programmer | 3900 |
| Socket Modules | FVEASM256BGMB |
| Device Name with Package | Xilinx XC7A50T-L2FTG256E (Custom 01) (ID=C093h) BGA(256) |
| Device Name with Package and Adapter | Xilinx XC7A50T-L2FTG256E (Custom 01) (ID=C093h) BGA(256) FVEASM256BGMB |