BPM Microsystems Device Search

Socket Adapters and Programmers Supporting Smart Modular Technologies SP9LDGR1AWE01 (Custom 01) BGA(100)

Socket Adapter (click to buy)DescriptionPackageDevices SupportedAdapter Capacity per SiteSockets per AdapterAdapter Price3800, 2800, 4800
FVE4ASM100LBGBAutomated SOCKET CARD, 100 PIN BGABGA(100)922, 3 or 41$775.00✓
FVE4ASMR100LBGFAutomated SOCKET CARD, 100 PIN BGABGA(100)1452, 3 or 41$1,103.00✓

Device Parameters

Device NameSmart Modular Technologies SP9LDGR1AWE01 (Custom 01)
ManufacturerSmart Modular Technologies
Part NumberSP9LDGR1AWE01 (Custom 01)
8-bit Bytes589824.0
Vcc(program)3.3
Set programmingnan
Memory Regions0h-Fh; 1000h-100Fh; 2000h-2003h; 3000h-300Fh; 4000h-41FFh; 5000h-5FFFh; 1 0000h-8 FFFFh;
Electrical Erasenan
PackagesBGA(100)
NotesIMPORTANT: This is a custom algorithm. Please contact BPM before using. Data Buffer Organization:
Data File BPWin Buffer Address (hex)
Current CID 0_0000 - 0_000F
New CID 0_1000 - 0_100F
OCR 0_2000 - 0_2003
CSD 0_3000 - 0_300F
Current ECSD 0_4000 - 0_41FF
Configuration File 0_5000 - 0_5FFF
Firmware File 1_0000 - 8_FFFF
Special Device Considerations:
1. The algorithm will check the current CID OCR CSD ECSD Firmware VersionFlash ID CE Count Bad Block Status Erase Count and Health Report of the device.
2. All values read from the device will be written to a log file located in your Auto Save Job Summary Report directory.This feature must be enabled otherwise the algorithm will fail.To enable please go to File->Configure and check Enable under Auto Save Job Summary Report.
3. For the current CID the algorithm will check against the current CID data file.In particular it will check the MID CBX OID PNM and PRV.
4. For the current OCR the algorithm will check against the OCR data file. The entire OCR will be checked.
5. For the current CSD the algorithm will check against the CSD data file.The entire CSD except the checksum and stop bit will be checked.
6. For the current ECSD the algorithm will check against the ECSD data file.For TLC devices and for the initial pass on pSLC devices the algorithm will check the MAX_PRE_LOADING_DATA_SIZE[21:18]ENH_MULT_SIZE[142:140] PARTITION_SETTING_COMPLETED[155] PARTITIONS_ATTRIBUTE[156] and SEC_COUNT[215:212].
7. For the current Firmware Revision the algorithm will check against the configuration data file.
8. For the current Flash ID and CE Count the algorithm will check against the configuration data file.The Flash ID will be checked for the indicated number of CE's.For CE's above the max CE the Flash ID should be reported as all 0x00 values.
9. For the Bad Block Status the CE block LUN type and error will be logged for each bad block.
10. For the Erase Count only the count for the first 100 blocks will be logged.
11. For the Health Report the number of factory and new bad blocks for each CE will be logged.Also the maximum minimum and average erase counts for TLC and pSLC modes will be logged.
12. If the new bad block count for any of the CE's is greater than the maximum allowed under Device->Settingsthe algorithm will fail the device. The default maximum is 0.
13. If the average erase count for either of the TLC or pSLC mode counts is greater than the limitsspecified under Device->Settings the algorithm will fail the device. The default for both is 10.
14. If all checks pass the algorithm will program the values from the new CID data file.In particular the MID OID PNM and PRV will be updated.The CBX PSN and MDT will be programmed with the values read from the device.The new and old values will be checked after programming.
15. Programming the CID can be disabled under Device->Settings. By default it is enabled.
16. If all checks pass and if pSLC is true in the configuration file the algorithm will do the pSLC conversion (enhancement).The final capacity and ENH_SIZE_MULT[142:140] will be parse from the configuration file.The algorithm will also calculate a final capacity based on the TLC capacity and ENH_SIZE_MULT[142:140].If this calculated value mismatches with the final capacity in the configuration file the algorithm will fail.
17. Doing the pSLC conversion can be disabled under Device->Settings. By default it is enabled.
18. After the pSLC conversion the ECSD and Health Report will be re-checked.
19. For the ECSD after the pSLC conversion the algorithm will check the MAX_PRE_LOADING_DATA_SIZE[21:18]ENH_MULT_SIZE[142:140] PARTITION_SETTING_COMPLETED[155] PARTITIONS_ATTRIBUTE[156] and SEC_COUNT[215:212].These values will all be determined by the original expected values and calculations performed by the algorithm.
20. For the Health Report after the pSLC conversion the algorithm will re-check the same values as before.
21. Field Firmware Updates can be enabled under Device->Settings. By default it is disabled.If enabled the FFU process will happen prior to the rest of the QC testing.
22. The firmware version display in ECSD[261:254] can be enabled under Device->Settings. By default it is disabled.The firmware version display setting will only be changed on the device if the FFU process is enabled.
"
Programmer2800
Socket ModulesFVE4ASMR100LBGF, FVE4ASM100LBGB, FVE4ASM100LBGB, FVE4ASMR100LBGF
Device Name with PackageSmart Modular Technologies SP9LDGR1AWE01 (Custom 01) BGA(100)
Device Name with Package and AdapterSmart Modular Technologies SP9LDGR1AWE01 (Custom 01) BGA(100) FVE4ASMR100LBGF, FVE4ASM100LBGB, FVE4ASM100LBGB, FVE4ASMR100LBGF

BPM Device Programmers Support Devices from 232 Manufacturers

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EON 200 found Lattice/Vantis 316 found Ricoh 15 found White Microelectronics 21 found
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Echelon Corporation 6 found Lucent Technologies 2 found SGS-Thomson 429 found Winstation Systems Inc. 3 found
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Server started at 2025-05-05 19:57:58 UTC. Database loaded at 2025-05-16 20:00:14 UTC. All data provided on a best-efforts basis. Prices and specifications subject to change without notice. You may search for an adapter using the following syntax: adapter:ASM48T* or adapter:FX4ASM48TD.