| Socket Adapter (click to buy) | Description | Package | Devices Supported | Adapter Capacity per Site | Sockets per Adapter | Adapter Price | Replacement Socket Card | 2900L, 3910, 4910, 3928, 3901, 3900, 2900, 4900, 1900 | 3800, 2800, 4800 | 3710-MK2, 4710 | 3610, 4610 | 1710, 2710 | 2610, 1610 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| ASMR144LQFPJ | Automated SOCKET MODULE, 144 PIN QFP | QFP(144) | 5 | 1 | 1 | $1,023.71 | LX2ASMR144LQFPJ | ✔ | ✔ | ✔ | ✔ | ||
| FVEG3ASMR144QPC | Automated SOCKET CARD, 144 PIN QFP | QFP(144) | 4 | 1 | 1 | $1,136.16 | ✔ | ✔ | |||||
| FX2ASMR144LQFPJ | Automated SOCKET MODULE, 144 PIN QFP | QFP(144) | 5 | 1 | 1 | $2,160.00 | LX2ASMR144LQFPJ | ✔ | ✔ | ||||
| FX2SMR144LQFPJ | SOCKET MODULE, 144 PIN QFP | QFP(144) | 5 | 1 | 2 | $1,950.00 | LX2ASMR144LQFPJ | ✔ | |||||
| SMR144LQFPJ | SOCKET MODULE, 144 PIN QFP | QFP(144) | 5 | 1 | 1 | $1,010.00 | LX2ASMR144LQFPJ | ✔ | ✔ |
| Device Name | Renesas UPD70F3525GJA9-GAE-Q-G (ID=1h) |
| Manufacturer | Renesas |
| Part Number | UPD70F3525GJA9-GAE-Q-G (ID=1h) |
| 8-bit Bytes | 33619968.0 |
| Vcc(program) | 3.3 |
| Set programming | nan |
| Memory Regions | 0h-1FFFFFh; 2000000h-200FFFFh; |
| Electrical Erase | Yes |
| Packages | QFP(144) |
| Notes | IMPORTANT: 3-Wire Serial I/O Mode. Code Flash is mapped to address space 0000000h-01FFFFFh. Data Flash is mapped to address space 2000000h-2007FFFh (2000000h-200FFFFFh in the Data Pattern with ID Tag). Data Pattern containing Data Flash must include valid ID Tags. Erase function for a Blank secured device is not supported. Set OCD ID is curretly not supported. The Option Byte 0 can be set under Device->Configure and programmed with Secure command. The Security Byte can be set under Device->Configure and programmed with Secure command. Security for this device cannot be verified. Security Byte: Set Bit 1 to 0 will disable Boot cluster rewrite. Set Bit 2 to 0 will disable Block Erase. Set Bit 3 to 0 will disable Chip Erase. Set Bit 4 to 0 will disable Porgram. Set Bit 5 to 0 will disable Read. Bits 0 6 and 7 are reserved and should be set to 1s. Bit 4 and 5 can be erased through Chip Erase but once bit 3 is programmed to 0 the whole chip is secured and no further operations can be performed. Once Bit 1 is programmed to 0 the boot block clusters specified are secured and no further operations can be performed. |
| Programmer | 3900 |
| Socket Modules | FVEG3ASMR144QPC, FVEG3ASML144LQFPJ (disc.) |
| Device Name with Package | Renesas UPD70F3525GJA9-GAE-Q-G (ID=1h) QFP(144) |
| Device Name with Package and Adapter | Renesas UPD70F3525GJA9-GAE-Q-G (ID=1h) QFP(144) FVEG3ASMR144QPC, FVEG3ASML144LQFPJ (disc.) |