BPM Microsystems Device Search

Socket Adapters and Programmers Supporting NXP Semiconductors LPC2368FET100 (ID=F925h) BGA(100)

Socket Adapter (click to buy)DescriptionPackageDevices SupportedAdapter Capacity per SiteSockets per Adapter2900L, 3910, 4910, 3928, 3901, 3900, 2900, 4900, 1900
FVE4ASMC100BFIAutomated R&DBGA(100)12, 3 or 41✓

Device Parameters

Device NameNXP Semiconductors LPC2368FET100 (ID=F925h)
ManufacturerNXP Semiconductors
Part NumberLPC2368FET100 (ID=F925h)
8-bit Bytes516096.0
Vcc(program)3.3
Set programmingnan
Memory Regions0h-7 DFFFh;
Electrical EraseYes
PackagesBGA(100)
NotesIMPORTANT:
Device Type: Microcontroller
Device Size: 512KB Flash
Algorithm Programming method: JTAG bootloader

Memory Organization:
Memory Type

Attributes(*)

 Included in default Range (Y/N) DUT Physical Byte Address(hex)(if this area is selected/Activated) BPWin Buffer Byte Address(hex)
Flash Memory R/W/E Yes 0000_0000 - 0007_DFFF 0000_0000 - 0007_DFFF
Default Algorithm Range --- --- 0000_0000 - 0007_DFFF 0000_0000 - 0007_DFFF
* R:Read only W:One time programmable (OTP) R/W:readable and one time programmable (OTP) R/W/E:readable and rewritable if not locked. Any configurations listed under Device-Specific" in the menu item Device-> Settings will be written to the DUT during "Program" operation depending on memory range selection. Special Device Considerations:
1. Device Configure option "Auto-run code in Flash after reset" can be set to change buffer location 14h to contain the 2's complement of the check-sum of the remaining interrupt vectors.
2. Code read protection available under Device Configure is enabled by programming the flash address location 1FCh (User flash sector 0). It works in conjunction with the following values:
3. CRP1 is enabled if value 12345678h(305419896 Decimal) is programmed. Access to chip via the JTAG pins is disabled.
4. CRP2 is enabled if value 87654321h(2271560481 Decimal) is programmed. Access to chip via JTAG pins is disabled. The following ISP commands are also disabled:Read MemoryWrite to RAM Go Copy RAM to flash and Compare. ISP erase command only allows erasure of all user sectors.
5. CRP3 is enabled if value 43218765h(1126270821 Decimal) is programmed. Access to chip via the JTAG pinsis disabled. ISP entry by pulling P2.10 LOW is disabled if a valid user code is present in flash sector 0.When this mode is invoked no future factory testing can be performed on the device.
6. Once CRP1/CRP2/CRP3 is programmed Erase Program Verify and all standalone operations are expected to fail as JTAG communication is disabled.
"
Programmer3900Socket ModulesFVE4ASMC100BFIDevice Name with PackageNXP Semiconductors LPC2368FET100 (ID=F925h) BGA(100)Device Name with Package and AdapterNXP Semiconductors LPC2368FET100 (ID=F925h) BGA(100) FVE4ASMC100BFI

BPM Device Programmers Support Devices from 237 Manufacturers

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Server started at 2026-10-13 16:03:45 UTC. Database loaded at 2026-10-15 16:04:43 UTC. Device list loaded at 2026-10-15 16:05:00 UTC. All data provided on a best-efforts basis. Prices and specifications subject to change without notice. You may search for an adapter using the following syntax: adapter:ASM48T* or adapter:FX4ASM48TD.