| Device Name | Micron MT29F4G16ABADAWP:D(Custom02) (ID=CCh) |
| Manufacturer | Micron |
| Part Number | MT29F4G16ABADAWP:D(Custom02) (ID=CCh) |
| 8-bit Bytes | nan |
| Vcc(program) | 3.3 |
| Set programming | nan |
| Memory Regions | 0h-107F FFFFh; |
| Electrical Erase | Yes |
| Packages | TSOP(48) |
| Notes | IMPORTANT: This is a custom algorithm. This algorithm expects that Bad Block markers of virgin devices are at byte 512. It does not change the location of these Bad Block markers. This is a NAND Flash Memory device with a minimum of 4016 blocks. Each block contains 256 pages which are divided into a 512Bytes main page and a 16-Byte control area. This algorithm is mapped with each page considered a contiguous (512+16) Byte page. Bad Blocks are indicated at byte 512 of the first page of a block. Bit Error Rate Tolerance is set to '8' (per 4 pages of 512Bytes each) by default. This can be set for individual pages by choosing the option "Subpage" under Device > NAND Options. " |
| Programmer | 3900 |
| Socket Modules | FVE4ASMR48TML |
| Device Name with Package | Micron MT29F4G16ABADAWP:D(Custom02) (ID=CCh) TSOP(48) |
| Device Name with Package and Adapter | Micron MT29F4G16ABADAWP:D(Custom02) (ID=CCh) TSOP(48) FVE4ASMR48TML |