BPM Microsystems Device Search

Socket Adapters and Programmers Supporting Freescale Semiconductor MK64FN1M0CLQ12 QFP(144)

Socket Adapter (click to buy)	Description	Package	Devices Supported	Adapter Capacity per Site	Sockets per Adapter	Replacement Socket Card	2900L, 3910, 4910, 3928, 3901, 3900, 2900, 4900, 1900	3710-MK2, 4710	3610, 4610	1710, 2710M, 2710	2610, 1610
ASMR144LQFPNF	Automated SOCKET MODULE, 144 PIN QFP	QFP(144)	76	1	1	LX2ASMR144LQFPNF		✓	✓	✓	✓
FX2ASMR144LQFPNF	Automated SOCKET MODULE, 144 PIN QFP	QFP(144)	76	1	1	LX2ASMR144LQFPNF		✓		✓
FX2SMR144LQFPNF	SOCKET MODULE, 144 PIN QFP	QFP(144)	76	1	2	LX2ASMR144LQFPNF				✓
LX2ASMR144LQFPNF	Automated REPLACEMENT D-CARD	QFP(144)	96	2	1		✓
SMR144LQFPNF	SOCKET MODULE, 144 PIN QFP	QFP(144)	76	1	1	LX2ASMR144LQFPNF				✓	✓

Device Parameters

Device Name	Freescale Semiconductor MK64FN1M0CLQ12
Manufacturer	Freescale Semiconductor
Part Number	MK64FN1M0CLQ12
8-bit Bytes	1048576.0
Vcc(program)	3.3
Set programming	nan
Memory Regions	0h-F FFFFh;
Electrical Erase	Yes
Packages	QFP(144)
Notes	IMPORTANT: Device Type: Microcontroller ARM Cortex M4. Device Size: 1024KByte Flash Memory Algorithm Programming Method: Ezport Memory Organization: Memory Type Attributes(*) Included in default Range (Y/N) DUT Physical Byte Address(hex)(if this area is selected/Activated) BPWin Buffer Byte Address(hex) Main Flash Memory R/W/E Yes 00000 - FFFFF 00000 - FFFFF Default Algorithm Range --- --- 00000 - FFFFF 00000 - FFFFF * R:Read only W: One time programmable (OTP) R/W: readable and one time programmable (OTP) R/W/E: readable and rewritable if not locked. Any configurations listed under Device-Specific" in the menu item Device-> Settings will be written to the DUT during "Program" operation regardless of memory range selection. Special Device Considerations: 1. Addresses [0x40C] is Flash security byte(FSEC). There are two security bits(bit 0 and bit 1) and two mass erase bits(bit 4 and bit 5) in FSEC. Using a value of 1 for bit 0 is not supporatble by this algorithm if datapattern has a value of 1 here this will be ignored during program. When mass is disabled(bit 4="0" bit 5="1") and device is secured the device will be no longer be erasable by this algorithm. 2. If data file enabled security at FSEC[0x40C] this algorithm will not verify the 16 bytes Flash Configuration field at address [0x0400-0x40F] 3. The algorithm supports the 32 bit long word in Big-Endian byte order. Please make sure that the data file is also in such byte order. "

Programmer3900Socket ModulesLX2ASMR144LQFPNFDevice Name with PackageFreescale Semiconductor MK64FN1M0CLQ12 QFP(144)Device Name with Package and AdapterFreescale Semiconductor MK64FN1M0CLQ12 QFP(144) LX2ASMR144LQFPNF

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