| Socket Adapter (click to buy) | Description | Package | Devices Supported | Adapter Capacity per Site | Sockets per Adapter | Adapter Price | 2900L, 3910, 4910, 3928, 3901, 3900, 2900, 4900, 1900 | 3800, 2800, 4800 |
|---|---|---|---|---|---|---|---|---|
| FVE4ASMC121BGR | Automated SOCKET CARD, 121 PIN BGA | BGA(121) | 10 | 2, 3 or 4 | 1 | $718.51 | ✔ | ✔ |
| Device Name | Freescale Semiconductor MK21FX512CMC12 |
| Manufacturer | Freescale Semiconductor |
| Part Number | MK21FX512CMC12 |
| 8-bit Bytes | 268566528.0 |
| Vcc(program) | 3.3 |
| Set programming | nan |
| Memory Regions | 0h-7FFFFh; 10000000h-1001FFFFh; |
| Electrical Erase | Yes |
| Packages | BGA(121) |
| Notes | IMPORTANT: The following describes the Data Pattern setup: Addresses [0x0-0x7FFFF] is Flash. Addresses [0x1000000-0x1001FFFF] is FlexMemory Flash(Block 1). Address [0x40C] is used for Flash security byte(FSEC). There are two security bits(bit 0 and bit 1) and two mass erase bits(bit 4 and bit 5) in FSEC. When mass erase is disabled(bit 4=0" bit 5="1") and device is secured the device can no longer be erased. Address [0x40D] is used for Flash option register(FOPT). There is an EZPORT_DIS bit (bit 1) that will disable the EzPort function. If disabled the programmer will no longer have access to the device. Verify will fail EPV if the EZPORT_DIS bit is disabled and all standalone function will fail after EPV. The algorithm supports the 32 bit long word in Big-Endian byte order. Please make sure that the data file is also in such byte order. " |
| Programmer | 3900 |
| Socket Modules | FVE4ASMC121BGR |
| Device Name with Package | Freescale Semiconductor MK21FX512CMC12 BGA(121) |
| Device Name with Package and Adapter | Freescale Semiconductor MK21FX512CMC12 BGA(121) FVE4ASMC121BGR |